Parallelization of Radio Algorithms for Multi-Processor Platforms

This paper analyzes software radio processor load and algorithm speed for different OFDM physical layer tasks. Starting with a single core DSP implementation, the most time consuming tasks are evaluated. After that, the matrix inversion for Wiener filter channel estimation is used to evaluate the algorithm behaviour on a multi-processor platform. We will show that parallel algorithms used for hardware realizations (e.g. systolic arrays) are not tailored to multi-processor architectures, due to their fine granularity. This leads to the conclusion that different algorithmic descriptions for the physical layer tasks have to be developed to provide an optimum fit to multi-processor architectures. Exemplarily an alternative optimization network based channel decoding algorithm is presented.